The fabrication of high capacitance capacitors in integrated circuitry has proven problematic. The problem is caused by competing goals in the fabrication of the capacitors. To provide maximum capacitance, maximum interface area between the two plates of the capacitor is necessary. However, to maximize the number of components in an integrated circuit a minimum of surface area of the integrated circuit must be used to fabricate each component. Prior art techniques have used vertical plate structures to try to provide the necessary interface area between the capacitor plates while using a minimum of surface area of the integrated circuit. However, even these vertical structures do not provide adequate capacitance.